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The Hull Pixelbot Meetup

Rob's Hull Pixelbot (Above: Rob's WiFi-enabled Pixelbot.)

Today Rob Miles was kind enough to give me a lift to the monthly hardware (or hull pixel bot) meetup. It was different to what I'm used to, but it was rather fun actually!

Rob Miles has built a kit that gives you the parts to build your very own Arduino-powered robot that trundles around on the floor. He's also managed to add a WiFi chip to it too - so you can (provided you write the code) connect to your pixel bot and control it remotely!

You can build your own by going to hullpixelbot.com.

I'll certainly be playing around with it and attending the next meetup (meetups are on the first Thursday of every month at 6:00pm at C4DI).

On CPU Registers in Assembly

I've been given some directed reading from the Intel Software Developer's Manual recently, and I found it complicated enough that I had to make about 2 1/2 pages of notes on what I read. This post is an attempt to explain to you what I learnt, in the hopes that I don't forget it! There will probably be mistakes in here - please point them out in the comments below!

The x86 instruction set contains a number of registers, each of which can be accessed in a number of different ways depending on the number of bits you wish to get or set.

Description 8 bit (byte) 16 bit (word) 32 bit (dword) 64 bit (qword)
General purpose AL AX EAX RAX +
General purpose BL BX EBX RBX +
General purpose CL CX ECX RCX +
General purpose DL DX EDX RDX +
General purpose (high byte) AH * - - -
General purpose (high byte) BH * - - -
General purpose (high byte) CH * - - -
General purpose (high byte) DH * - - -
? DIL + DI EDI RDI +
? SIL + SI ESI RSI +
Base Pointer BPL + SP ESP RSP +
Stack Pointer SPL + BP EBP RBP +
General Purpose R8L + R8W + R8D + R8 +
General Purpose R9L + R9W + R9D + R9 +
General Purpose R10L + R10W + R10D + R10 +
General Purpose R11L + R11W + R11D + R11 +
General Purpose R12L + R12W + R12D + R12 +
General Purpose R13L + R13W + R13D + R13 +
General Purpose R14L + R14W + R14D + R14 +
General Purpose R15L + R15W + R15D + R15 +

This table requires some explanation. Registers suffixed with * may only be utilised in 32 bit assembly. Similarly, registers suffixed with + may be utilised in 64 bit assembly only. Each row is a register, and each column represents a different number of bits. For example, the EAX register can be accessed as an 8 bit register with AL, 16 bit as AX, 32 bit as EAX, and 64 bit as RAX.

The exception here is the AL, BL, CL, DL, AH, BH, CH and DH registers. These actually refer to the same register. Let's take AL and AH for example. The AL register refers to the first 8 bits of the AX register, and the AH register refers to the second 8 bits. This is called the Low byte and the High byte.

In addition to the registers above, there are two others which can also be accessed as 8, 16, 32 and 64 bit registers:

Description 16 bit 32 bit 64 bit
Instruction Pointer IP EIP RIP
CPU Flags FLAGS EFLAGS RFLAGS

These registers should not be written to under normal usage though, as the CPU uses these to maintain its internal state. The instruction pointer points to the instruction that the CPU is currently executing, whereas the CPU Flags register holds all of the current flags, such as the result of a cmp (comparison).

That concludes this post on CPU registers. I don't think I can quite believe I'm posting this actually.... a year ago I would never have suspected I'd be learning about how to program the CPU itself in assembly.

Art by Mythdael